Semiconductor transistors, in particular field-effect controlled switching devices such as a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) or an Insulated Gate Bipolar Transistor (IGBT), have been used for various applications including but not limited to use as switches in power supplies and power converters, electric cars, air-conditioners, and even stereo systems. Particularly with regard to power devices capable of switching large currents and/or operating at higher voltages, low on-state resistance Ron, high breakdown voltages Ubd in a blocking mode, high robustness and/or good softness are often desired.
To achieve low on-state resistance Ron and high breakdown voltages Ubd, compensation semiconductor devices were developed. The compensation principle is based on a mutual compensation of charges in n- and p-doped regions, which are often also referred to as n- and p-doped pillar regions, in the drift zone of a vertical MOSFET.
Typically, the charge compensation structure formed by p-type and n-type regions is arranged below the actual MOSFET-structure, with its n-type source, p-type body regions and gate regions, and also below the associated MOS-channels that are arranged next to one another in the semiconductor volume of the semiconductor device or interleaved with one another in such a way that, in the off-state, their charges can be mutually depleted and that, in the activated state or on-state, there results an uninterrupted, low-impedance conduction path from a source electrode near the surface to a drain electrode arranged on the back side.
By virtue of the compensation of the p-type and n-type dopings, the doping of the current-carrying region can be significantly increased in the case of compensation components, which results in a significant reduction of the on-state resistance Ron despite the loss of a current-carrying area. The reduction of the on-state resistance Ron of such semiconductor power devices is associated with a reduction of the heat generated by the current in the on-state, so that such semiconductor power devices with charge compensation structure remain “cool” compared with conventional semiconductor power devices.
To achieve high breakdown voltages Ubd, an edge-termination structure may be used in a peripheral area surrounding the active area with active MOSFET-cells. However, the peripheral area requires chip area and thus increases costs. Further, it is often desired for charge compensation MOSFETs that the electric field strength in the peripheral area is low at the semiconductor surface and that the peripheral area has a higher reverse blocking capability than the active area. For n-channel charge compensation MOSFETs, a combination of a buried p-type JTE (Junction Termination Extension)-region and an n-type JTE-region arranged on the p-type JTE has been found to allow tuning the breakdown behavior of the peripheral area by varying the doping concentration of the n-type JTE-region. Depending on manufacturing processes for the compensation structure, adjusting the doping concentration of the n-type JTE-region may be laborious.
Accordingly, there is a need to improve manufacturing of charge compensation semiconductor devices.